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adxintrin.h
1.76
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ammintrin.h
3.01
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avx2intrin.h
56.15
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avxintrin.h
46.88
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bmi2intrin.h
3.17
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bmiintrin.h
5.32
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bmmintrin.h
1.13
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cpuid.h
8
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cross-stdarg.h
2.5
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emmintrin.h
49.56
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f16cintrin.h
3.2
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float.h
8.67
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fma4intrin.h
8.78
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fmaintrin.h
10.15
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fxsrintrin.h
1.87
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ia32intrin.h
6.2
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immintrin.h
3.85
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iso646.h
1.24
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limits.h
5.26
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lwpintrin.h
3.14
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lzcntintrin.h
2.15
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mm3dnow.h
6.32
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mm_malloc.h
1.71
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mmintrin.h
29.87
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nmmintrin.h
1.35
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omp.h
3.56
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pkuintrin.h
1.49
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pmmintrin.h
4.14
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popcntintrin.h
1.57
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prfchwintrin.h
1.54
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rdseedintrin.h
1.82
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rtmintrin.h
2.54
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smmintrin.h
27.05
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stdalign.h
1.18
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stdarg.h
3.98
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stdbool.h
1.4
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stddef.h
13.3
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stdfix.h
5.86
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stdint-gcc.h
6.86
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stdint.h
328
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stdnoreturn.h
1.11
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syslimits.h
330
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tbmintrin.h
5.06
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tmmintrin.h
8.02
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unwind.h
10.48
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varargs.h
139
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wmmintrin.h
4.26
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x86intrin.h
2.32
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xmmintrin.h
40.7
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xopintrin.h
27.77
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xsaveintrin.h
1.94
KB
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xsaveoptintrin.h
1.63
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xtestintrin.h
1.52
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Code Editor : tmmintrin.h
/* Copyright (C) 2006-2013 Free Software Foundation, Inc. This file is part of GCC. GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version. GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. Under Section 7 of GPL version 3, you are granted additional permissions described in the GCC Runtime Library Exception, version 3.1, as published by the Free Software Foundation. You should have received a copy of the GNU General Public License and a copy of the GCC Runtime Library Exception along with this program; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see <http://www.gnu.org/licenses/>. */ /* Implemented from the specification included in the Intel C++ Compiler User Guide and Reference, version 9.1. */ #ifndef _TMMINTRIN_H_INCLUDED #define _TMMINTRIN_H_INCLUDED #ifndef __SSSE3__ # error "SSSE3 instruction set not enabled" #else /* We need definitions from the SSE3, SSE2 and SSE header files*/ #include <pmmintrin.h> extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_hadd_epi16 (__m128i __X, __m128i __Y) { return (__m128i) __builtin_ia32_phaddw128 ((__v8hi)__X, (__v8hi)__Y); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_hadd_epi32 (__m128i __X, __m128i __Y) { return (__m128i) __builtin_ia32_phaddd128 ((__v4si)__X, (__v4si)__Y); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_hadds_epi16 (__m128i __X, __m128i __Y) { return (__m128i) __builtin_ia32_phaddsw128 ((__v8hi)__X, (__v8hi)__Y); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_hadd_pi16 (__m64 __X, __m64 __Y) { return (__m64) __builtin_ia32_phaddw ((__v4hi)__X, (__v4hi)__Y); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_hadd_pi32 (__m64 __X, __m64 __Y) { return (__m64) __builtin_ia32_phaddd ((__v2si)__X, (__v2si)__Y); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_hadds_pi16 (__m64 __X, __m64 __Y) { return (__m64) __builtin_ia32_phaddsw ((__v4hi)__X, (__v4hi)__Y); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_hsub_epi16 (__m128i __X, __m128i __Y) { return (__m128i) __builtin_ia32_phsubw128 ((__v8hi)__X, (__v8hi)__Y); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_hsub_epi32 (__m128i __X, __m128i __Y) { return (__m128i) __builtin_ia32_phsubd128 ((__v4si)__X, (__v4si)__Y); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_hsubs_epi16 (__m128i __X, __m128i __Y) { return (__m128i) __builtin_ia32_phsubsw128 ((__v8hi)__X, (__v8hi)__Y); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_hsub_pi16 (__m64 __X, __m64 __Y) { return (__m64) __builtin_ia32_phsubw ((__v4hi)__X, (__v4hi)__Y); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_hsub_pi32 (__m64 __X, __m64 __Y) { return (__m64) __builtin_ia32_phsubd ((__v2si)__X, (__v2si)__Y); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_hsubs_pi16 (__m64 __X, __m64 __Y) { return (__m64) __builtin_ia32_phsubsw ((__v4hi)__X, (__v4hi)__Y); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_maddubs_epi16 (__m128i __X, __m128i __Y) { return (__m128i) __builtin_ia32_pmaddubsw128 ((__v16qi)__X, (__v16qi)__Y); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_maddubs_pi16 (__m64 __X, __m64 __Y) { return (__m64) __builtin_ia32_pmaddubsw ((__v8qi)__X, (__v8qi)__Y); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_mulhrs_epi16 (__m128i __X, __m128i __Y) { return (__m128i) __builtin_ia32_pmulhrsw128 ((__v8hi)__X, (__v8hi)__Y); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_mulhrs_pi16 (__m64 __X, __m64 __Y) { return (__m64) __builtin_ia32_pmulhrsw ((__v4hi)__X, (__v4hi)__Y); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_shuffle_epi8 (__m128i __X, __m128i __Y) { return (__m128i) __builtin_ia32_pshufb128 ((__v16qi)__X, (__v16qi)__Y); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_shuffle_pi8 (__m64 __X, __m64 __Y) { return (__m64) __builtin_ia32_pshufb ((__v8qi)__X, (__v8qi)__Y); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_sign_epi8 (__m128i __X, __m128i __Y) { return (__m128i) __builtin_ia32_psignb128 ((__v16qi)__X, (__v16qi)__Y); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_sign_epi16 (__m128i __X, __m128i __Y) { return (__m128i) __builtin_ia32_psignw128 ((__v8hi)__X, (__v8hi)__Y); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_sign_epi32 (__m128i __X, __m128i __Y) { return (__m128i) __builtin_ia32_psignd128 ((__v4si)__X, (__v4si)__Y); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_sign_pi8 (__m64 __X, __m64 __Y) { return (__m64) __builtin_ia32_psignb ((__v8qi)__X, (__v8qi)__Y); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_sign_pi16 (__m64 __X, __m64 __Y) { return (__m64) __builtin_ia32_psignw ((__v4hi)__X, (__v4hi)__Y); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_sign_pi32 (__m64 __X, __m64 __Y) { return (__m64) __builtin_ia32_psignd ((__v2si)__X, (__v2si)__Y); } #ifdef __OPTIMIZE__ extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_alignr_epi8(__m128i __X, __m128i __Y, const int __N) { return (__m128i) __builtin_ia32_palignr128 ((__v2di)__X, (__v2di)__Y, __N * 8); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_alignr_pi8(__m64 __X, __m64 __Y, const int __N) { return (__m64) __builtin_ia32_palignr ((__v1di)__X, (__v1di)__Y, __N * 8); } #else #define _mm_alignr_epi8(X, Y, N) \ ((__m128i) __builtin_ia32_palignr128 ((__v2di)(__m128i)(X), \ (__v2di)(__m128i)(Y), \ (int)(N) * 8)) #define _mm_alignr_pi8(X, Y, N) \ ((__m64) __builtin_ia32_palignr ((__v1di)(__m64)(X), \ (__v1di)(__m64)(Y), \ (int)(N) * 8)) #endif extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_abs_epi8 (__m128i __X) { return (__m128i) __builtin_ia32_pabsb128 ((__v16qi)__X); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_abs_epi16 (__m128i __X) { return (__m128i) __builtin_ia32_pabsw128 ((__v8hi)__X); } extern __inline __m128i __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_abs_epi32 (__m128i __X) { return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_abs_pi8 (__m64 __X) { return (__m64) __builtin_ia32_pabsb ((__v8qi)__X); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_abs_pi16 (__m64 __X) { return (__m64) __builtin_ia32_pabsw ((__v4hi)__X); } extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) _mm_abs_pi32 (__m64 __X) { return (__m64) __builtin_ia32_pabsd ((__v2si)__X); } #endif /* __SSSE3__ */ #endif /* _TMMINTRIN_H_INCLUDED */
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